1. Field of the Invention
The present invention relates to a semiconductor chip (hereinafter, called LSI) with a pad part connected between an integrated circuit and an external circuit so as to output/input a signal to/from the integrated circuit.
2. Description of the Related Art
FIGS. 8(a) through 8(c) are plan views showing a conventional LSI. FIG. 8(a) is a view showing a layout of pads in the LSI, FIG. 8(b) is an enlarged view of a part indicated by “A” in FIG. 8(a), and FIG. 8(c) is a view showing a connection condition in FIG. 8(a).
In this LSI 10, an integrated circuit not shown is formed on a substrate, and a plurality of wiring patterns are formed to input/output a signal from/to the integrated circuit. Plural pads 11 to be terminals are formed in the plural wiring patterns. The surface of the LSI 10 is covered by a protective film 12. The protective film 12 is partially removed at parts corresponding to the plural pads 11 so as to form windows 13. Plural pad parts 14 are formed in a manner that each pad part 14 consists of the window 13 and the pad 11 exposed from the window 13.
These pad parts 14 are used for wire bonding. As shown in FIG. 8(c), the pad 11 exposes from the window 13 in the pad part 14 is connected with an external circuit through a wire 15, whereby the external circuit and the LSI are assembled.
FIGS. 9(a) through 9(c) are plan views showing another conventional LSI. FIG. 9 (a) is a view showing a layout of pads in the LSI, FIG. 9(b) is an enlarged view of a part indicated by B in FIG. 9(a), and FIG. 9(c) is a view showing a connection condition in FIG. 9(a).
In this LSI 20, an integrated circuit such as the same integrated circuit in the LSI 1 is formed on a substrate, and a plurality of wiring patterns are formed. Plural pads 11 to be terminals are formed in the plural wiring patterns similarly to the LSI 10. The surface of the LSI 20 is covered by a protective film 21. The protective film 21 is partially removed at parts corresponding to the plural pads 11 so as to form windows 23 as shown in FIG. 9(b). A bump 22 of material such as solder is deposited on the pad exposed from the window 23, and the pad 11 further projects from the surface of the protective film 21. A pad part 25 consists of the window 23 and the bump 22.
As shown in FIG. 9(c), the LSI 20 is directly connected to an external circuit 26 with the bump 22 of the pad part 25, whereby assembly is executed by the TAB (Tape Automated Bonding) method or the COG (Chip On Glass) method.
However, the conventional LSIs have the following problems. Each LSI 10, 20 has only one connection method connecting to an external circuit in accordance with each structure of the pad part 14, 25. Thus, though the integrated circuit and the wiring pattern of the LSI 10 are similar to those of the LSI 20 and the LSI 10 operates similarly to the LSI 20, it is possible to use only one assembly method based on each structure of the pad part 14, 25. As a result, it is necessary to separately manufacture the LSI 10 which is connected to the external circuit by wire bonding and the LSI 20 which is connected to the external circuit by the TAB method, therefore, it is impossible to improve development efficiency and mass production effect.